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Highlights
- 2GHz 64-bit octo core ARM® Cortex™ A53 CPU
- 750 MHz ARM Mali™-820MP3 GPU processor
- HW UHD H.265/VP9 60fps 10-bit video decoder and low latency 1080 60fps video encoder
- Dolby Vision, HLG and HDR10 processing
- TrustZone based security for DRM video streaming
- WIFI, BT, USB, SD, Ethernet, Analog Audio and TS peripheral ports
- Power management auxiliary processor
S912 is an advanced application processor designed for high performance 4k OTT/IP Set Top Box (STB) and gaming box applications. It integrates a powerful CPU/GPU subsystem, a secured 4K video CODEC engine and a best-in-class HDR image processing pipeline with all major peripherals to form the ultimate low power multimedia AP. The main system CPU is an octa-core ARM Cortex-A53 CPU grouped into two CPU clusters with large unified L2 cache. Each cluster, which consists of four Cortex-A53 cores with L1 instruction/data cache for each core, is controlled by DVFS software and can be independently clocked up to 2GHz. In addition, the Cortex-A53 cores include the NEON SIMD co-processor and I/D-cache to improve the overall system performance.
The graphic subsystem consists of two graphic engines and a flexible video/graphic output pipeline. The ARM Mali-T820MP3 GPU 3 shader engines, with 1 Arithmetic Unit (ALU ), 1 Load/Store Pipeline and 1 Texture Pipeline contained in each shader, handles all the OpenGL® ES 3.1/2.0/1.1, DirectX®11 FL9_3, OpenCL™ 1.1/1.2 full profile and Android™ RenderScript; while the 2.5D graphics processor handles additional scaling, alpha, rotation and color space conversion operations. Together, the CPU and GPU handle all operating system, networking, user-interface and gaming related tasks. The video output pipeline includes advanced HDR10, HLG and Dolby Vision HDR processing, REC709/BT2020 processing, motion adaptive edge enhancing de-interlacing, flexible programmable scalar, and many picture enhancement filters before passing the enhanced image to the video output ports.
Amlogic Video Engine (AVE-10) offloads the Cortex-A53 CPUs from all video CODEC processing. It includes dedicated hardware video decoder and encoder. AVE-10 is capable of decoding 4K2K resolution video at 60fps within Trusted Video Path (TVP) for secured DRM applications. It supports all major video formats including MVC, MPEG-1/2/4, VC-1/WMV, AVS, AVS+, RealVideo, MJPEG streams, H.264, H265-10, VP9-10 and also JPEG. The independent encoder can concurrently encode in JPEG, and H.264 up to 1080p at 60fps.
S912 integrates all standard audio/video input/output interfaces including a HDMI2.0a transmitter with 3D, HDR, CEC and HDCP 2.2 support, stereo audio DAC outputs, a CVBS output, PCM, I2S and SPDIF digital audio input/output interfaces, stereo PDM digital MIC inputs and DVP camera interface. S912 also integrates a set of functional blocks for digital TV broadcasting streams. The built-in two demux can process the TV streams from the serial and parallel transport stream input interface, which can connect to external tuner/demodulator and CI+ module. An ISO7816 smart card interface and a crypto-processor are built in to help handling encrypted traffic and media streams.
The processor has rich advanced network and peripheral interfaces, including a Gigabits Ethernet MAC with RGMII interface, 10/100M Ethernet PHY, triple USB 2.0 high-speed ports (one OTG and two HOSTs) and multiple SDIO/SD card controllers, UART, I2C, highspeed SPI and PWMs. Standard development environment utilizing GNU/GCC Android tool chain is supported.
CPU Sub-system
- Octa core ARM Cortex-A53 CPU up to 2GHz (DVFS)
- Two CPU clusters with four CPU cores for each, big cluster optimized for high-performance and little cluster optimized for low power
- ARMv8-A architecture with Neon and Crypto extensions
- 8-stage in-order full dual issue pipeline
- Unified system L2 cache
- Advanced TrustZone security system
- Application based traffic optimization using internal QoS-based switching fabrics
3D Graphics Processing Unit
- ARM Mali-T820MP3 GPU up to 750MHz (DVFS)
- Built-in Memory Management Unit (MMU) and L2 cache
- 2250Mpix/sec and 350Mtri/sec
- OpenGL® ES 3.1/2.0/1.1, DirectX®11 FL9_3, OpenCL™ 1.1/1.2 full profile and Android™ RenderScript support
2.5D Graphics Processor
- Fast bitblt engine with dual inputs and single output
- Programmable raster operations (ROP)
- Programmable polyphase scaling filter
- Supports multiple video formats 4:2:0, 4:2:2 and 4:4:4 and multiple pixel formats (8/16/24/32 bits graphics layer)
- Fast color space conversion
- Advanced anti-flickering filter
Crypto Engine
- AES/AES-XTS block cipher with 128/192/256 bits keys, standard 16 bytes block size and streaming ECB, CBC and CTR modes
- DES/TDES block cipher with ECB and CBC modes supporting 64 bits key for DES and 192 bits key for 3DES
- Hardware crypto key-ladder operation and DVB-CSA for transport stream encryption
- Built-in hardware True Random Number Generator (TRNG), CRC and SHA-1/SHA-2/HMAC SHA engine
Video/Picture CODEC
- Amlogic Video Engine (AVE) with dedicated hardware decoders and encoders
- Supports multiple “secured” video decoding sessions and simultaneous decoding and encoding
Video/Picture Decoding
- VP9-10 Profile-2 up to 4Kx2K@60fps
- H.265 HEVC MP-10@L5.1 up to 4Kx2K@60fps
- H.264 AVC HP@L5.1 up to 4Kx2K@30fps
- H.264 MVC up to 1080P @60fps
- MPEG-4 ASP@L5 up to 1080P@60fps (ISO-14496)
- WMV/VC-1 SP/MP/AP up to 1080P@60fps
- AVS-P16(AVS+) /AVS-P2 JiZhun Profile up to 1080P@60fps
- MPEG-2 MP/HL up to 1080P@60fps (ISO-13818)
- MPEG-1 MP/HL Up to 1080P@60fps (ISO-11172)
- RealVideo 8/9/10 up to 1080P@60fps
- WebM up to VGA
- Multiple language and multiple format sub-title video support
- MJPEG and JPEG unlimited pixel resolution decoding (ISO/IEC-10918)
- Supports JPEG thumbnail, scaling, rotation and transition effects
- Supports *.mkv,*.wmv,*.mpg, *.mpeg, *.dat, *.avi, *.mov, *.iso,*.mp4, *.rm and *.jpg file formats
Video/Picture Encoding
- Independent JPEG and H.264 encoder with configurable performance/bit-rate
- JPEG image encoding
- H.264 video encoding up to 1080P@60fps with low latency
Video Post-Processing Engine
- Supports Dolby Vision, HDR10 and HLG HDR processing
- Motion adaptive 3D noise reduction filter
- Advanced motion adaptive edge enhancing de-interlacing engine
- 3:2 pull-down support
- Programmable poly-phase scalar for both horizontal and vertical dimension for zoom and windowing
- Programmable color management filter (to enhance blue, green, red, face and other colors)
- Dynamic Non-Linear Luma filter
- Deblocking filters
- Programmable color matrix pipeline
- Video mixer: 2 video planes and 2 graphics planes per video output
Video Output
- Built-in HDMI 2.0a transmitter including both controller and PHY with
HDR, CEC and HDCP 2,2, 4Kx2K@60 max resolution output
- CVBS 480i/576i standard definition output
- RGB888 TTL interface with TCON up to 1920x1080 resolution
- Supports all standard SD/HD/FHD video output formats: 480i/p, 576i/p, 720p, 1080i/p and 4Kx2K
Camera Interface
- ITU 601/656 parallel video input with down-scalar
- Supports camera input as YUV422, RGB565,16bit RGB or JPEG
Audio Decoder and Input/Output
- Supports MP3, AAC, WMA, RM, FLAC, Ogg and programmable with 7.1/5.1 down-mixing
- I2S audio interface supporting 8-channel (7.1) input and output
- Built-in serial digital audio SPDIF/IEC958 output and PCM input/output
- Stereo digital microphone PDM input
- Built-in stereo audio DAC
- Supports concurrent dual audio stereo channel output with combination of analog+PCM or I2S+PCM
Memory and Storage Interface
- 16/32-bit SDRAM memory interface running up to DDR2400
- Supports up to 2GB DDR3/4, DDR3L, LPDDR2/3 with dual ranks
- Supports SLC/MLC/TLC NAND Flash with 60-bit ECC, compatible to Toshiba toggle mode in addition to ONFI 2.2
- SDSC/SDHC/SDXC card and SDIO interface with 1-bit and 4-bit data bus width supporting spec version 2.x/3.x/4.x DS/HS modes up to UHS-I SDR104
- eMMC and MMC card interface with 1/4/8-bit data bus width fully supporting spec version 5.0 HS400
- Supports serial 1, 2 or 4-bit NOR Flash via SPI interface
- Built-in 4k bits One-Time-Programming memory for key storage
Network
- Integrated IEEE 802.3 10/100/1000M Gigabit Ethernet MAC controller with RGMII interface
- Integrated 10/100M PHY interface
- Supports Energy Efficiency Ethernet (EEE) mode
- Optional 50MHz and 125MHz clock output to external Ethernet PHY
- WiFi/IEEE802.11 & Bluetooth supporting via SDIO/USB/UART/PCM
- Network interface optimized for mixed WIFI and BT traffic
Digital Television Interface
- Transport stream (TS) input interface with built-in demux processor for connecting to external digital TV tuner/demodulator and one output TS interface
- Built-in PWM, I2C and SPI interfaces to control tuner and demodulator
- Integrated CI+ port and ISO 7816 smart card controller
Integrated I/O Controllers and Interfaces
- Triple USB 2.0 high-speed USB I/O, two USB Hosts and one USB OTG
- Multiple UART, I2C and SPI interface with slave select
- Multiple PWMs
- Programmable IR remote input/output controllers
- Built-in 10bit SAR ADC with 2 input channels
- A set of General Purpose IOs with built-in pull up and pull down
System, Peripherals and Misc. Interfaces
- Integrated general purpose timers, counters, DMA controllers
- 24 MHz crystal input
- Embedded debug interface using ICE/JTAG
Power Management
- Multiple external power domains controlled by PMIC
- Multiple internal power domains controlled by software
- Multiple sleep modes for CPU, system, DRAM, etc.
- Multiple internal PLLs for DVFS operation
- Multi-voltage I/O design for 1.8V and 3.3V
- Power management auxiliary processor in a dedicated always-on (AO) power domain that can communicate with an external PMIC
Security
- Trustzone based Trusted Execution Environment (TEE)
- Secured boot, encrypted OTP, encrypted DRAM with memory integrity checker, hardware key ladder and internal control buses and storage
- Protected memory regions and electric fence data partition
- Hardware based Trusted Video Path (TVP) , video watermarking and secured contents (needs SecureOS software)
- Secured IO and secured clock
Package
- LFBGA, 15mmx15mm, 0.65 ball pitch, RoHS compliant
- 2GHz 64-bit octo core ARM® Cortex™ A53 CPU
- 750 MHz ARM Mali™-820MP3 GPU processor
- HW UHD H.265/VP9 60fps 10-bit video decoder and low latency 1080 60fps video encoder
- Dolby Vision, HLG and HDR10 processing
- TrustZone based security for DRM video streaming
- WIFI, BT, USB, SD, Ethernet, Analog Audio and TS peripheral ports
- Power management auxiliary processor
S912 is an advanced application processor designed for high performance 4k OTT/IP Set Top Box (STB) and gaming box applications. It integrates a powerful CPU/GPU subsystem, a secured 4K video CODEC engine and a best-in-class HDR image processing pipeline with all major peripherals to form the ultimate low power multimedia AP. The main system CPU is an octa-core ARM Cortex-A53 CPU grouped into two CPU clusters with large unified L2 cache. Each cluster, which consists of four Cortex-A53 cores with L1 instruction/data cache for each core, is controlled by DVFS software and can be independently clocked up to 2GHz. In addition, the Cortex-A53 cores include the NEON SIMD co-processor and I/D-cache to improve the overall system performance.
The graphic subsystem consists of two graphic engines and a flexible video/graphic output pipeline. The ARM Mali-T820MP3 GPU 3 shader engines, with 1 Arithmetic Unit (ALU ), 1 Load/Store Pipeline and 1 Texture Pipeline contained in each shader, handles all the OpenGL® ES 3.1/2.0/1.1, DirectX®11 FL9_3, OpenCL™ 1.1/1.2 full profile and Android™ RenderScript; while the 2.5D graphics processor handles additional scaling, alpha, rotation and color space conversion operations. Together, the CPU and GPU handle all operating system, networking, user-interface and gaming related tasks. The video output pipeline includes advanced HDR10, HLG and Dolby Vision HDR processing, REC709/BT2020 processing, motion adaptive edge enhancing de-interlacing, flexible programmable scalar, and many picture enhancement filters before passing the enhanced image to the video output ports.
Amlogic Video Engine (AVE-10) offloads the Cortex-A53 CPUs from all video CODEC processing. It includes dedicated hardware video decoder and encoder. AVE-10 is capable of decoding 4K2K resolution video at 60fps within Trusted Video Path (TVP) for secured DRM applications. It supports all major video formats including MVC, MPEG-1/2/4, VC-1/WMV, AVS, AVS+, RealVideo, MJPEG streams, H.264, H265-10, VP9-10 and also JPEG. The independent encoder can concurrently encode in JPEG, and H.264 up to 1080p at 60fps.
S912 integrates all standard audio/video input/output interfaces including a HDMI2.0a transmitter with 3D, HDR, CEC and HDCP 2.2 support, stereo audio DAC outputs, a CVBS output, PCM, I2S and SPDIF digital audio input/output interfaces, stereo PDM digital MIC inputs and DVP camera interface. S912 also integrates a set of functional blocks for digital TV broadcasting streams. The built-in two demux can process the TV streams from the serial and parallel transport stream input interface, which can connect to external tuner/demodulator and CI+ module. An ISO7816 smart card interface and a crypto-processor are built in to help handling encrypted traffic and media streams.
The processor has rich advanced network and peripheral interfaces, including a Gigabits Ethernet MAC with RGMII interface, 10/100M Ethernet PHY, triple USB 2.0 high-speed ports (one OTG and two HOSTs) and multiple SDIO/SD card controllers, UART, I2C, highspeed SPI and PWMs. Standard development environment utilizing GNU/GCC Android tool chain is supported.
CPU Sub-system
- Octa core ARM Cortex-A53 CPU up to 2GHz (DVFS)
- Two CPU clusters with four CPU cores for each, big cluster optimized for high-performance and little cluster optimized for low power
- ARMv8-A architecture with Neon and Crypto extensions
- 8-stage in-order full dual issue pipeline
- Unified system L2 cache
- Advanced TrustZone security system
- Application based traffic optimization using internal QoS-based switching fabrics
3D Graphics Processing Unit
- ARM Mali-T820MP3 GPU up to 750MHz (DVFS)
- Built-in Memory Management Unit (MMU) and L2 cache
- 2250Mpix/sec and 350Mtri/sec
- OpenGL® ES 3.1/2.0/1.1, DirectX®11 FL9_3, OpenCL™ 1.1/1.2 full profile and Android™ RenderScript support
2.5D Graphics Processor
- Fast bitblt engine with dual inputs and single output
- Programmable raster operations (ROP)
- Programmable polyphase scaling filter
- Supports multiple video formats 4:2:0, 4:2:2 and 4:4:4 and multiple pixel formats (8/16/24/32 bits graphics layer)
- Fast color space conversion
- Advanced anti-flickering filter
Crypto Engine
- AES/AES-XTS block cipher with 128/192/256 bits keys, standard 16 bytes block size and streaming ECB, CBC and CTR modes
- DES/TDES block cipher with ECB and CBC modes supporting 64 bits key for DES and 192 bits key for 3DES
- Hardware crypto key-ladder operation and DVB-CSA for transport stream encryption
- Built-in hardware True Random Number Generator (TRNG), CRC and SHA-1/SHA-2/HMAC SHA engine
Video/Picture CODEC
- Amlogic Video Engine (AVE) with dedicated hardware decoders and encoders
- Supports multiple “secured” video decoding sessions and simultaneous decoding and encoding
Video/Picture Decoding
- VP9-10 Profile-2 up to 4Kx2K@60fps
- H.265 HEVC MP-10@L5.1 up to 4Kx2K@60fps
- H.264 AVC HP@L5.1 up to 4Kx2K@30fps
- H.264 MVC up to 1080P @60fps
- MPEG-4 ASP@L5 up to 1080P@60fps (ISO-14496)
- WMV/VC-1 SP/MP/AP up to 1080P@60fps
- AVS-P16(AVS+) /AVS-P2 JiZhun Profile up to 1080P@60fps
- MPEG-2 MP/HL up to 1080P@60fps (ISO-13818)
- MPEG-1 MP/HL Up to 1080P@60fps (ISO-11172)
- RealVideo 8/9/10 up to 1080P@60fps
- WebM up to VGA
- Multiple language and multiple format sub-title video support
- MJPEG and JPEG unlimited pixel resolution decoding (ISO/IEC-10918)
- Supports JPEG thumbnail, scaling, rotation and transition effects
- Supports *.mkv,*.wmv,*.mpg, *.mpeg, *.dat, *.avi, *.mov, *.iso,*.mp4, *.rm and *.jpg file formats
Video/Picture Encoding
- Independent JPEG and H.264 encoder with configurable performance/bit-rate
- JPEG image encoding
- H.264 video encoding up to 1080P@60fps with low latency
Video Post-Processing Engine
- Supports Dolby Vision, HDR10 and HLG HDR processing
- Motion adaptive 3D noise reduction filter
- Advanced motion adaptive edge enhancing de-interlacing engine
- 3:2 pull-down support
- Programmable poly-phase scalar for both horizontal and vertical dimension for zoom and windowing
- Programmable color management filter (to enhance blue, green, red, face and other colors)
- Dynamic Non-Linear Luma filter
- Deblocking filters
- Programmable color matrix pipeline
- Video mixer: 2 video planes and 2 graphics planes per video output
Video Output
- Built-in HDMI 2.0a transmitter including both controller and PHY with
HDR, CEC and HDCP 2,2, 4Kx2K@60 max resolution output
- CVBS 480i/576i standard definition output
- RGB888 TTL interface with TCON up to 1920x1080 resolution
- Supports all standard SD/HD/FHD video output formats: 480i/p, 576i/p, 720p, 1080i/p and 4Kx2K
Camera Interface
- ITU 601/656 parallel video input with down-scalar
- Supports camera input as YUV422, RGB565,16bit RGB or JPEG
Audio Decoder and Input/Output
- Supports MP3, AAC, WMA, RM, FLAC, Ogg and programmable with 7.1/5.1 down-mixing
- I2S audio interface supporting 8-channel (7.1) input and output
- Built-in serial digital audio SPDIF/IEC958 output and PCM input/output
- Stereo digital microphone PDM input
- Built-in stereo audio DAC
- Supports concurrent dual audio stereo channel output with combination of analog+PCM or I2S+PCM
Memory and Storage Interface
- 16/32-bit SDRAM memory interface running up to DDR2400
- Supports up to 2GB DDR3/4, DDR3L, LPDDR2/3 with dual ranks
- Supports SLC/MLC/TLC NAND Flash with 60-bit ECC, compatible to Toshiba toggle mode in addition to ONFI 2.2
- SDSC/SDHC/SDXC card and SDIO interface with 1-bit and 4-bit data bus width supporting spec version 2.x/3.x/4.x DS/HS modes up to UHS-I SDR104
- eMMC and MMC card interface with 1/4/8-bit data bus width fully supporting spec version 5.0 HS400
- Supports serial 1, 2 or 4-bit NOR Flash via SPI interface
- Built-in 4k bits One-Time-Programming memory for key storage
Network
- Integrated IEEE 802.3 10/100/1000M Gigabit Ethernet MAC controller with RGMII interface
- Integrated 10/100M PHY interface
- Supports Energy Efficiency Ethernet (EEE) mode
- Optional 50MHz and 125MHz clock output to external Ethernet PHY
- WiFi/IEEE802.11 & Bluetooth supporting via SDIO/USB/UART/PCM
- Network interface optimized for mixed WIFI and BT traffic
Digital Television Interface
- Transport stream (TS) input interface with built-in demux processor for connecting to external digital TV tuner/demodulator and one output TS interface
- Built-in PWM, I2C and SPI interfaces to control tuner and demodulator
- Integrated CI+ port and ISO 7816 smart card controller
Integrated I/O Controllers and Interfaces
- Triple USB 2.0 high-speed USB I/O, two USB Hosts and one USB OTG
- Multiple UART, I2C and SPI interface with slave select
- Multiple PWMs
- Programmable IR remote input/output controllers
- Built-in 10bit SAR ADC with 2 input channels
- A set of General Purpose IOs with built-in pull up and pull down
System, Peripherals and Misc. Interfaces
- Integrated general purpose timers, counters, DMA controllers
- 24 MHz crystal input
- Embedded debug interface using ICE/JTAG
Power Management
- Multiple external power domains controlled by PMIC
- Multiple internal power domains controlled by software
- Multiple sleep modes for CPU, system, DRAM, etc.
- Multiple internal PLLs for DVFS operation
- Multi-voltage I/O design for 1.8V and 3.3V
- Power management auxiliary processor in a dedicated always-on (AO) power domain that can communicate with an external PMIC
Security
- Trustzone based Trusted Execution Environment (TEE)
- Secured boot, encrypted OTP, encrypted DRAM with memory integrity checker, hardware key ladder and internal control buses and storage
- Protected memory regions and electric fence data partition
- Hardware based Trusted Video Path (TVP) , video watermarking and secured contents (needs SecureOS software)
- Secured IO and secured clock
Package
- LFBGA, 15mmx15mm, 0.65 ball pitch, RoHS compliant
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